1. Technical Field
The present invention relates generally to an improved data processing system and, in particular, to a method and system for monitoring the performance of the processor in a data processing system when an interrupt occurs. Still more particularly, the present invention relates to a method, apparatus, and computer instructions for counting interrupts by type.
2. Description of Related Art
A typical data processing system utilizes processors to execute a set of instructions in order to perform a certain task, such as reading a specific character from the main memory. However, as the number of tasks required to be executed by the processor increases, the efficiency of the processor's access patterns to memory and the characteristics of such access become important factors for engineers seeking to optimize the system operation.
There are currently mechanisms in the prior art that can count occurrences of software-selectable events, such as cache misses, instructions executed, I/O data transfer requests, and the time a given process may take to execute within a data processing system. One such mechanism is a performance monitor. A performance monitor assists in performing an analysis of a system by monitoring selected characteristics and determining the state of the system at a particular time. The analysis may provide information of how the processor is used when instructions are executed and the processor's interaction with the main memory when data is stored. In addition, the analysis may provide detail regarding the amount of time that has passed between events occurring in the system. Thus, the performance monitor may be used to assist in analyzing system performance.
However, the performance monitor described above does not provide the ability to count a particular type of interrupt using hardware. An interrupt occurs when a device, such as, for example, a mouse or keyboard, raises an interrupt signal to notify the processor that an event has occurred. When the processor accepts an interrupt request, the processor completes its current instruction and passes control to an interrupt handler. The interrupt handler executes an interrupt service routine that is associated with the interrupt. An interrupt may also be caused by a specific machine language operation code, for example, Motorola 68000's TRAP, a product from Motorola, Inc. In this case, an unexpected software condition such as, for example, divide by zero causes the processor to store the current state, store identifying information about the particular interrupt, and pass control to an interrupt handler that handles this unexpected software condition.
An interrupt descriptor table (IDT) is a system table that associates each interrupt with corresponding interrupt handler containing corresponding interrupt service routines. The performance monitor described above also does not provide hardware support for counting interrupts by type. It would be advantageous to have an improved method, apparatus, and computer instructions for counting interrupts by type and storing the count in the IDT or outside of the IDT in an interrupt count table (ICT). In addition, it would be advantageous to have an improved method to support counting of interrupts by type using hardware instead of a software selectable performance monitor.